designer’s notebook
Unpacking Logic as it is Used on a Printed Circuit Board
You need a buffer zone.
The truth shall set you free. The truth table of a logic device determines the outcome of a logical operation. A handful of operations are described as gates. The gates are named for the function that applies. To start, two main ones are the AND gate and OR gate. Both usually have two inputs and one output.

You may have a hallway or stairwell light in your home with a light switch at either end. When both switches are in the down position, the light is on. When both are up, the light is also on. If one is up and the other down, the light is off. The truth table for those two switches is shown in TABLE 1.

We represent the binary logic states with a one or zero, although there are exceptions. The one can also be called high state, while the zero represents a low logical state. One or zero, high or low, voltage applied to the pin or not applied: all are ways to describe the situation. Low is not always synonymous with ground. It could be a negative voltage. Some devices have a tri-state output that uses negative and positive voltages with ground as the middle state.

TABLE 1. Binary Logic States
Binary Logic States table for SW1, SW2, and Result
Guitar effects pedal small signal processing carried out with the help of basic logic devices
FIGURE 1. Guitar effects pedal small signal processing carried out with the help of basic logic devices.
Turning code into action. Setting that little wrinkle aside, machine language is a string of ones and zeros compiled from a list of logic statements in the software. Once compiled, the binary code can be applied to the logic gates to do something useful, or at least amusing, in terms of manipulating the input to drive an outcome.

To activate an AND gate, both input pins must have a voltage applied. An OR gate needs only one of the input pins to have a charge, but a positive outcome can be had with a nominal voltage applied to both input pins. If we don’t want a high state when both pins of an OR gate are active, use an exclusive OR gate, also known as an XOR gate.

Further, we could flip the bit, so all the outcomes are reversed. Put an N on the front of the descriptor for a NAND and a NOR gate. The OR gate can be both exclusive and inverted, which we call an XNOR gate. The two light switches I mentioned resemble the EX-NOR circuit. They are also useful in memory devices.

Buffers and inverters. Fleshing out the other simple logic gates are the inverter and the buffer. These logic devices have one input pin and one output pin. As you’d expect, an inverter will flip the bit from one state to the other, depending on what comes in.

When it comes to a buffer, the idea is to refresh the signal without altering the state, so we can send it on its way. The buffer may be useful as a means to revive the voltage to its full specification, while removing any other signal integrity issues. The schematic symbol for the buffer is like the inverter, except there is no little circle on the output pin. As you can see, the circle is common to all the gates that invert the outcome.

The evolution of logic. Over the course of time, the working voltage for logic gates has gone down. The smaller voltage swings happen faster with less switching noise. When I started out, we had TTL (transistor-transistor logic), which ran on +/-5V. Along came CMOS architecture, and three is the new five. It keeps on progressing. The data rate jumps while the voltage goes down. That progress means the threshold between a zero and a one state is a little more difficult to read if there is significant voltage drop over a length of trace or wire.

That’s where those buffers come in. You could also create a buffer by chaining two inverters together in a series. The output is refreshed while the double switch puts the logic in the original state. Since inverters typically come with six or more gates in a standard package, there may be a few empty slots somewhere to use for that purpose. You can be creative with these building blocks.

A visual of the schematic symbols and truth tables of typical logic gates
FIGURE 2. A visual of the schematic symbols and truth tables of typical logic gates. Credit: IBM.
4LS09 QUAD AND GATE typical configuration in a 14-pin package
FIGURE 3. 4LS09 QUAD AND GATE typical configuration in a 14-pin package has four logic gates, or six in the case of inverters or buffers. Credit: Circuit Digest.
These primitives are themselves made of a small number of transistors and passive elements. The AND gate is not restricted to two input pins. It could take three or four input pins registering a 1 for the output pin to follow suit. Other circuits combine functions into more integrated features. You may have heard of a flip-flop (not the shoe), a level shifter or a comparator, for instance. These are conveniently packaged groups of logic gates for specific purposes, of which there are many.

Gate swapping. (Because nobody is perfect at schematic capture.) The first iteration of the schematic is unlikely to result in a totally smooth flow, especially when we allow the system to randomly assign the individual gates to their packages. Even when we try to plan ahead, the PCB layout may have areas where reassigning the logic gates is beneficial. That might be done by revisiting the schematic.

Another way is to optimize the connections while in the layout using a gate-swapping routine. First, you have to be sure gate swapping is, in fact, allowed. Then you have to back-annotate the schematic to align with the layout. Your approach will depend on your normal tool-flow and the complexity/flexibility of the circuit.

These humble circuits have become cobbled together with others to form massive colonies with billions of transistor-level residents. It all begins with statements written in software compiled into binary code that drives the whole process. The super massive system on a chip is no more complex than this. It’s just that there is a lot of it all in one location. Have fun trying to keep up with our digital future.

John Burkhert Jr. headshot
John Burkhert Jr.
is a career PCB designer experienced in military, telecom, consumer hardware and, lately, the automotive industry. Originally, he was an RF specialist but is compelled to flip the bit now and then to fill the need for high-speed digital design. He enjoys playing bass and racing bikes when he’s not writing about or performing PCB layout. His column is produced by Cadence Design Systems and runs monthly.