IEEC
State-of-the-Art Technology Flashes
Updates in silicon and electronics technology.
Ed.: This is a special feature courtesy of Binghamton University.
IBM announces 2nm GAA-FET technology. IBM announced its 2-nanometer CMOS technology, developed at its Albany research center. The development has technical firsts: the use of bulk Si wafers with bottom dielectric isolation under the nanosheet stack; reducing leakage and enabling 12-nnm gate lengths; a second-generation inner spacer dry process for precise gate control; FEOL EUV patterning to allow nanosheet widths from 15 to 70nm; and a novel multi-Vt scheme. This technology is expected to give a 45% performance boost or 75% power reduction, compared with the 7nm. (IEEC file #12324, Semiconductor Digest, 6/11/21)
IBM announces 2nm GAA-FET technology.
Light-based method creates 2-D polymer. Linköping University researchers developed a method that uses light to manufacture 2-D polymers that have the thickness of a single molecule and could create a path for the development of ultra-thin, functional 2-D materials with highly defined crystalline structures. Using an on-surface photo-polymerization process, they tested a way to manufacture a 0.5nm-thick, 2-D polymer consisting of several hundred thousand molecules identically linked. The two-step method takes advantage of the self-organizing properties of fluorinated anthracene triptycene molecules. Because the polymerization takes place in a vacuum, the material is protected from contamination. The 2-D polymer film is stable under atmospheric conditions. (IEEC file #12370, Photonics Spectra, 7/14/21)

Researchers discover a new inorganic material with lowest thermal conductivity ever reported. University of Liverpool researchers have discovered a new inorganic material with the lowest thermal conductivity ever reported. This discovery paves the way for the development of new thermoelectric materials that will be critical for a sustainable society and represents a breakthrough in the control of heat flow at the atomic scale, achieved by materials design. They used complementary strategies to suppress the contribution of the longitudinal and transverse phonons to heat transport in layered materials containing different types of intrinsic chemical interface. BiOCl and Bi2O2Se encapsulate these design principles for longitudinal and transverse modes, respectively, and the bulk superlattice material combines these effects by ordering both interface types within its unit cell to reach an extremely low thermal conductivity of 0.1W K−1 m−1 at room temperature along its stacking direction. (IEEC file #12371, Science Daily, 7/15/21)

A*Star stacks four wafers. A*Star researchers have developed technology that can stack up to four layers of wafers using a multi-wafer fusion bonding process and a one-step TSV process, potentially decreasing the cost of production by 50%. This was made possible by combining face-to-face and back-to-back wafer bonding with one-step TSV after stacking. The 3-D integration, TSV process and multi-wafer fusion bonding technology breakthroughs will allow manufacturers to better integrate 3-D products with high added value and will mean new business opportunities with low-cost 3-D DRAM and manufacturing for device manufacturers and material suppliers. (IEEC file #12368, Electronics Weekly, 7/8/21)

A*Star stacks four wafers
IBM adopts heavy-hex lattice for quantum computing. IBM is moving all its quantum computing devices to the heavy-hex lattice topology, which promises a reduction in error rates, permitting quantum systems to overcome one of the key challenges keeping them from maximizing their potential. All IBM quantum systems will be based on this architecture, which represents the fourth iteration in the company’s quantum computing topology. In a heavy-hex lattice architecture, each unit cell of the lattice consists of a hexagonal arrangement of qubits, with an additional qubit on each edge. It’s scalable, which will help IBM meet its stated goal of advancing from 127 qubits in quantum computing systems this year to 1,000 qubits in 2023. (IEEC file #12367, Fierce Electronics, 7/8/21)

Combining perovskite with silicon solar cells converts more energy from sun. Oxford PV researchers have shown pairing metal halide perovskites with conventional silicon leads to a more powerful solar cell that overcomes the 26% efficiency limit of using silicon cells alone. Perovskites fulfill all the optoelectronic requirements for a photovoltaic cell and can be manufactured using existing processes. These features make perovskite a perfect plug-and-play addition to silicon technology, as it can be deposited as a layer onto a conventional silicon solar cell. They’re proving the potential of perovskite-on-silicon tandem technology through the continuous achievement of world-record efficiencies, with the current record at 29.52%. Adding perovskite onto existing silicon photovoltaics is the fastest way to improve silicon performance. (IEEC file #12429, Semiconductor Digest, 8/17/21)

Researchers create flexible Cortex-M0 CPU on plastic substrate. Arm researchers have developed the first operational 32-bit microprocessor using a flexible plastic substrate instead of a brittle slab of silicon. The low-cost chip is ultra-thin and carries over 12 times as many transistors as previous flexible microprocessors. The chip called “PlasticARM” is made from metal-oxide transistors using conventional equipment manufactured on a cheap plastic substrate that permits it to bend and twist without snapping. The flexible prototype raises the possibility of embedding billions of very inexpensive, ultra-thin, form-fitting microprocessors inside clothing, labels, food packaging, and other objects. (IEEC file #12390, Electronic Design, 7/29/21)

Researchers create flexible Cortex-M0 CPU on plastic substrate
Photonic chips for fault-tolerant quantum computing. Xanadu and IMEC announced a partnership to develop the next generation of photonic qubits based on ultra-low loss silicon nitride (SiN) waveguides. Xanadu is developing a unique type of quantum computer, one based on photonics. Specifically, these photonic qubits are based on squeezed states, a special type of light generated by chip-integrated silicon photonic devices. Such an approach uses particles of light to carry information through photonic chips, rather than electrons or ions used by other approaches. Xanadu’s photonic approach offers the benefits of scalability to one million qubits via optical networking, room-temperature computation, and the natural ability to leverage fabrication R&D centers. (IEEC file #12430, Semiconductor Digest, 8/17/21)

New fabrication approach yields high-performance flexible electronics. Stanford University researchers have devised a manufacturing approach that yields flexible, atomically thin transistors less than 100nm in length. The process is a sequence of steps that starts with a rigid base substrate of silicon coated with glass, one layer of atoms at a time, using CVD techniques. Then it’s overlaid with small nano-patterned gold electrodes. These critical parts are patterned and formed on rigid silicon and permitted to cool, then applied to the flexible material. Following a bath in deionized water, the entire device stack is peeled back and transferred to the flexible polyimide. The entire structure is just 5 microns thick. (IEEC file #12396, Science Daily, 7/29/21)

New fabrication approach yields high-performance flexible electronics
3-D printed solid-state battery rivals lithium-ion. Lithium-ion batteries are everywhere: smartphones, laptops, and electric vehicles. Sakuu researchers are working to develop new chemistries that are lighter weight, more energy-dense, and ideally safer than today’s champion technology. The next frontier is the 3-D-printed solid-state battery. Sakuu researchers have developed a solid-state battery equal to or better than the performance of current lithium-ion batteries. The technology permits the company to deposit multiple materials onto a single thin layer. To get the highest energy density batteries, they minimize the volume of all the elements that are not adding anything to the performance of the battery. That’s the kind of thing that printing really enables. (IEEC file #12434, IEEE Spectrum, 8/19/21)
New printing technique for flexible electronics. A new technology that enables more efficient and effective transfer printing for electronic devices has been developed by researchers at DGIST in Korea. The technique could improve the manufacturing of precision devices such as biosensors and wearable devices. The printing technique makes use of the fact that different materials expand at different rates when heated. By laying the device to be printed onto the surface to which it will be attached and then increasing the temperature, the method causes thermal stress, which creates cracks between the layers. This allows the layers to be separated successfully after printing, ensuring reliable and instant release of the device. (IEEC file #12408, Nanowerk, 8/6/21)
New printing technique for flexible electronics
Market Trends
Microprocessor market to top $100 billion. The microprocessor (MPU) market is on track to exceed $100 billion for the first time ever this year, thanks to strong increases in cellphone application processor revenues. IC Insights projects MPU sales to increase 14% in 2021, which will lift the total microprocessor market to a record-high $103.7 billion, compared to a 9% increase that was expected in January. IC Insights is also lifting its five-year revenue forecast for microprocessors to a CAGR of 7.1%, which will put sales volume at $127.8 billion in 2025 compared to about $90.7 billion in 2020. Increasing reliance on the Internet, the pandemic resulted in a strong wave of growth in large-screen, high-end smartphones, many of them 5G handsets, which caused an upsurge of revenue for cellphone application processors in 2020. (IEEC file #12446, Electronics Weekly, 8/26/21)

Could all your digital photos be stored as DNA? MIT researchers have demonstrated a way to easily retrieve data files stored as DNA. This could be a step toward using DNA archives to store enormous quantities of photos, images, and other digital content. DNA is a thousandfold denser than even flash memory, and another property is DNA polymer, once made, doesn’t consume energy. Hence, one can write the DNA and store it forever. Scientists have already demonstrated they can encode images and pages of text as DNA. They have now demonstrated one way to do that: by encapsulating each data file into a 6-micrometer particle of silica, which is labeled with short DNA sequences that reveal the contents. Using this approach, they could accurately pull out individual images. (IEEC file #12333, Science Daily, 6/10/21)

“Clinic-on-the-wrist” module enables wearable health monitoring. Rockley Photonics introduced its complete full-stack “clinic-on-the-wrist” digital health sensor system. Rockley’s sensor module and associated designs for consumer products integrate hardware and application firmware to enable wearable devices to monitor multiple biomarkers, including core body temperature, blood pressure, body hydration, alcohol, lactate, and glucose trends, among others. Its full-stack sensing solution features a wristband that contains the sensor module and communicates with custom cloud-based analytical engines via smartphone app, unlike more common spectroscopy solutions, which use broad-spectrum light sources and generate a large number of discrete laser outputs from a single silicon chip covering a broad optical band. (IEEC file #12377, BioOptics World, 7/15/21)

Renewables accounted for 21% of US electricity in 2020. In 2020, renewable energy sources, including wind, hydroelectric, solar, biomass, and geothermal energy, generated a record 834 billion kWh of electricity, or about 21% of all the electricity generated in the US. Only natural gas (1.617 trillion kWh) produced more electricity than renewables in the United States in 2020. This outcome in 2020 was due mostly to significantly less coal use in US electricity generation and steadily increasing use of wind and solar. (IEEC file #12406, EIA, 7/28/21)

Renewables accounted for 21% of US electricity in 2020
New manufacturing technique for flexible electronics. Stanford University researchers have invented a manufacturing technique that yields flexible, atomically thin transistors less than 100nm in length, which is several times smaller than previously possible. The technique is performed as follows: Atop a solid slab of silicon coated with glass, an atomically thin film of the 2-D semiconductor molybdenum disulfide (MoS2) is formed and overlaid with small nano-patterned gold electrodes. Then, the layering technique (CVD) grows a film of MoS2 one layer of atoms at a time. The resulting film is three atoms thick but requires temperatures reaching 850oC to work. With a simple bath in deionized water, the entire device stack peels back, fully transferred to the flexible polyimide. (IEEC file #12383, Semiconductor Digest, 7/21/21)

Wearable brain-machine interface turns intentions into actions. A new wearable brain-machine interface (BMI) system could improve the quality of life for people with motor dysfunction or paralysis, even those struggling with locked-in syndrome. Georgia Institute of Technology researchers combined wireless soft scalp electronics and virtual reality in a system that allows the user to imagine an action and wirelessly control a wheelchair or robotic arm. BMI systems are a rehabilitation technology that analyzes a person’s brain signals and translates that neural activity into commands, turning intentions into actions. The non-invasive method for acquiring those signals is EEG. Future work will focus on optimizing electrode placement and advanced integration of stimulus-based EEG. (IEEC file #12397, Science Daily, 7/21/21)

Bike tire uses NASA shape memory alloy technology. The SMART Tire Co. is developing the first-ever consumer application of the NASA airless SMA tech. The eco-friendly bicycle tire from SMART (Shape Memory Alloy Radial Technology) is called METL. The tire is made from an advanced lightweight material called NiTinol+. This material will not corrode or rust. The advantage is it is elastic like rubber, yet strong like titanium, exhibiting perfect shape memory without ever going flat. For now, it will serve as a real-world technology demonstrator not only for bicycles but for other possible vehicle applications in the future. (IEEC file #12402, Design Fax, 7/27/21)

Bike tire uses NASA shape memory alloy technology
Recent Patents
PCB assembly comprising chemical vapor CVDD wires for thermal transport (assignee: Microchip Technology), pub. no. WO/2021089974. A method and apparatus for conducting heat away from a semiconductor die are disclosed. A board assembly is disclosed that includes a circuit board, a semiconductor die electrically coupled to the circuit board, and a chemical vapor deposition diamond (CVDD)-coated wire. A portion of the CVDD-coated wire extends between a hot-spot on the semiconductor die and the circuit board. The board assembly includes a layer of thermally conductive paste disposed between the hot spot on the semiconductor die and the circuit board. The layer of thermally conductive paste is in direct contact with a portion of the CVDD-coated wire.

Fiber-to-chip grating coupler for photonic circuits (assignee: Taiwan Semiconductor Manufacturing), pub. no. US11002915. In one embodiment, a method for communication includes transmitting optical signals between a semiconductor photonic die on a substrate and an optical fiber array attached to the substrate using at least one corresponding grating coupler on the semiconductor photonic die, wherein at least one grating coupler each comprises a plurality of coupling gratings, a waveguide, a cladding layer, a first reflection layer and a second reflection layer, wherein the plurality of coupling gratings each comprises at least one step in a first lateral direction and extends in a second lateral direction, wherein the first and second lateral directions are parallel to a surface of the substrate and perpendicular to each other in a grating plane.

Semiconductor wafer having integrated circuits with bottom local interconnects (assignee: IBM Corp.), pub. no. US11011411. A semiconductor wafer includes a substrate. The substrate includes a first substrate region doped with a first dopant and a second substrate region doped with a second dopant. The wafer further includes a buried oxide (BOX) layer formed on the substrate and a channel layer formed above the BOX layer. A first transistor is operably disposed on the substrate in the first substrate region, and a second transistor is operably disposed on the substrate in the second substrate region. First doped source and drain structures electrically connected to the substrate in the first substrate region and separated by portions of the channel layer and the BOX layer. Second doped source and drain structures electrically connected to the substrate in the second substrate region.

Liquid immersion-cooled electronic device and liquid immersion-cooled processor (assignee: Exascaler Inc.), patent. no. 16/612,705. A processor module includes a first circuit substrate and a second circuit substrate, each having a processor mounting area and a memory mounting area on one surface thereof. One processor is mounted in the processor mounting area, while comb-like arranged memory modules are mounted in the memory mounting area. The surface of the first circuit substrate and surface of the second circuit substrates are combined face-to-face and positioned such that the processor mounting area and memory mounting area of the first circuit substrate are face-to-face, respectively, with the processor mounting area and the memory mounting area of the second circuit substrate, and end parts of the plurality of comb-like arranged memory modules.

Crack sensor for sensing cracks in a solder pad (assignee: STMicroelectronics), patent. no. 11,018,096. An integrated circuit includes a solder pad, which includes, in a superposition of metallization levels, an underlying structure formed by a network of first regular metal traces that are arranged to reinforce the mechanical strength of the underlying structure and electrically connect between an upper metallization level and a lower metallization level of the underlying structure. The underlying structure further includes a detection electrical path formed by second metal traces passing between the first metal traces in the metallization levels, the detection electrical path having an input terminal and an output terminal. Electrical sensing of the detection electrical path is made to supply a measurement that is indicative of the presence of cracks in the underlying structure.

Cooling system for power modules (assignee: Delta Electronics), pub. no. EP3833171. The cooling system includes two covers: a plurality of power modules and a plurality of first spaces. The power modules are disposed between the two covers. Each power module includes a housing, a circuit board, and heat dissipation elements disposed on the two sides of the circuit board. A through-hole is on the housing. Each first space is formed between two neighboring power modules and the neighboring power module. The heat dissipation elements of each power module are located in the neighboring first spaces, and the through-hole of each power module is in communication with the neighboring first spaces. The first spaces and the through-holes of the power modules communicate with each other to form a coolant passageway collaboratively for permitting a coolant to pass through.

Gary Miller
is technology analyst at IEEC, Binghamton University. He has over 40 years’ experience in electronic packaging. He previously was the chief mechanical engineer at Lockheed Martin; gmiller@binghamton.edu.
The INTERGRATED ELECTRONICS ENGINEERING CENTER (IEEC)
at Binghamton University is a New York Center of Advanced Technology (CAT) responsible for the advancement of electronics packaging. Its mission is to provide research into electronics packaging to enhance our partners’ products, improve reliability and understand why parts fail. Research thrusts are in 2.5/3-D packaging, automotive and harsh environments, bioelectronics, flexible and additive electronics, materials for packaging and energy storage, MEMS, photonics, power electronics, sensors, embedded electronics, and thermal challenges in electronic packaging. More information is available at binghamton.edu/ieec.