The Flexperts
How Big is Your Moat?
If the clearance is not at least 10 mils, yields may drop.
One of the often-overlooked aspects of a board design is the moat. Perhaps this conjures up images of Monty Python’s Holy Grail, but moat does not refer to the ring around a castle. Instead, this is the clearance between pads and a surrounding copper plane, sometimes also referred to as embedded clearance.

These clearances often are 0.004″ to 0.005″ wide. This may seem like plenty of room, but Pareto analysis tells us this can lower overall manufacturing yield. These clearances often lead to unexpected yield loss, depending on certain design and processing factors. Believe it or not, etching these moats or clearances is difficult, due to the closed-ended, circular nature of the clearances. They do not image or etch well and are prone to shorting.

One reason is that driving the energy into the resist can result in bleeding and create an imaging short. But etching is also more difficult, as the etchant flow is trapped in a dead-end donut. These can conspire to create unintended image/etch shorts.

moat
Figure 1. The clearance between pads and a surrounding copper plane is called a moat.
larger moat
Figure 2. A larger moat could eliminate room for material between pads.
Mechanically there is potential for misregistration shorts, depending on the drill size, annular ring design and layer count. In such cases, the drilled and plated hole may short to the neighboring plane.

A good rule of thumb for mechanically drilled holes is to maintain at least 0.010″ clearance from a drilled hole edge to any adjacent copper. This helps ensure adequate mechanical clearance to account for layer misregistration, drill inaccuracies, as well as any internal etch-back or wicking in the hole. Note that this measurement is from drilled hole edge, not finished hole edge. Drilling is often 0.003″ to 0.006″ larger than the finished hole requirement to account for plating thicknesses and tolerances. This is where things end up tighter than expected if the designer does not account for drilled size compared to finished size.

Keep in mind there may be literally thousands of these embedded pad clearances on plane layers, especially as we see more HDI features. With multiple ground, power and voltage planes, this adds up. The term DPMO (defects per million opportunities) comes to mind. If we reduce the number of these potential tight spots, yield improves.

Our first advice is to grow the clearances, if possible. Clearances of 0.006″ or 0.007″ are a substantial improvement for 1-oz. and thinner copper. If the layer is 2-oz. copper or thicker, we suggest another 0.0015″ to 0.002″ per ounce.
Sometimes this may present a challenge or two. If the moats get bigger, there may not be room for material between pads. That is fine, provided we don’t leave isolated pieces of copper. Those can lead to slivers of copper that may come loose, or electrically floating planes. Completely remove any slivers. Review any isolated floating planes for opportunities to make at least one web connection to the larger plane.

In other cases, there may be signals between pads, and the plane is supposed to cover them. Here, do your best to thread the needle with signal trace and minimize the web between pads (FIGURE 2).

Beware the autorouter! It will not always center traces between pads (FIGURE 3). The autorouter will route signals to meet the minimum requirement, not the optimal solution. Often it will pack two traces between pads when it should or could have routed one to each side of a pad. This may not be perfect when it comes to impedance signals but in practice is likely to be overlooked in the system.

This is where a designer can maximize their impact by taking the time to center traces, as well as revisit how traces are routed between pads. Is there an alternate path that opens space to reduce the plane? Are traces moving efficiently between the pads? Many times, the angle the trace cuts between pads causes smaller spacing than necessary. Design diligence can result in a much higher yield and lower overall unit costs. The investment in design time will pay off in production.

autorouter
Figure 3. The autorouter might not center traces between pads or take an inefficient angle.
nonfunctional pads
Figure 4. Smaller nonfunctional pads can increase embedded clearance.
Another option: Consider the size of the nonfunctional pads. After completing routing, if there is no room to reduce the webbing of the plane, an acceptable option is to reduce or eliminate nonfunctional pads. On plane layers, a vast majority of pads are nonfunctional, since only the ground or power connections are made. Conversely, on the signal layers the ground layer pads are similarly isolated. There are many opportunities to increase spacing without impacting the available plane area.

As you polish up the design of your castle, er, circuit, pay attention to the moats. An extra mil of clearance will make a big difference. The extra time spent will be worthwhile and improve your curb appeal.

Mark Finstad headshot
Nick Koop
is director of flex technology at TTM Technologies (ttm.com), vice chairman of the IPC Flexible Circuits Committee and co-chair of the IPC-6013 Qualification and Performance Specification for Flexible Printed Boards Subcommittee; nick.koop@ttmtech.com. He and co-“Flexpert”
Mark Finstad
(mark.finstad@flexiblecircuit.com) welcome your suggestions.